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Wednesday, July 29, 2020 | History

2 edition of design of an asynchronous multiplier. found in the catalog.

design of an asynchronous multiplier.

Jianwei Liu

design of an asynchronous multiplier.

by Jianwei Liu

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Published by University of Manchester in Manchester .
Written in English


Edition Notes

Thesis (M.Sc.), - University of Manchester, Department of Computer Science.

ContributionsUniversity of Manchester. Department of Computer Science.
The Physical Object
Pagination114p.
Number of Pages114
ID Numbers
Open LibraryOL16576195M


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Design of an asynchronous multiplier by Jianwei Liu Download PDF EPUB FB2

As for asynchronous multiplier, [26] minimizes power consumption of a multiplier by three methods such as asynchronous control, radix-2 algorithm, and split registers. The design in [27] is. A number of bundled-data asynchronous multiplier have been described that implement the modified Booth algorithm, in which the number of iterations is fixed [9]– [11].

A bundled-data. With asynchronous circuit design becoming a powerful tool in the development of new digital systems, circuit designers are expected to have asynchronous design skills and be able to leverage them to reduce power consumption and increase system speed.

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